Display signal converting apparatus

ABSTRACT

In a signal converting apparatus for converting a binary signal representing predetermined information into a drive signal for operating a display device having a plurality of luminous elements, there are provided a shift resistor for storing the binary signal, a first MOS matrix circuit connected to the shift resistor for converting the binary signal into a decimal signal, a second MOS matrix circuit connected to the first MOS matrix circuit for converting the decimal signal into a character signal to be displayed, and a drive circuit connected to the second MOS matrix circuit for and applying the character signal to and driving the luminous elements.

United States Patent 11 1 Hatsukano et al'. Apr. 9, 1974 [54] DISPLAYSIGNAL CONVERTING 3,396,378 8/1968 Keith, Jr. 340/336 x APPARATUS3,541,543 11/1970 Crawford et al 346/336 X [75] Inventors: g j i p fPrimary Examiner-Charles D. Miller omlya o awagoe a C Attorney, Agent,or Firm-Craig and Antonelli Tokyo, Japan [73] Assignee: Hitachi, Ltd.,Tokyo, Japan 57 ABSTRACT [22] Filed: Dec. 1, 1971 In a signal convertingapparatus for converting a binary signal representing predeterminedinformation [2]] Appl into a drive signal for operating a display devicehaving a plurality of luminous elements, there are pro- [30] ForeignApplication Priority Data vided a shift resistor for storing the binarysignal, a Dec. 2, 1970 Japan 45-105831 first MOS matrix CircuitConnected to the Shift resistor for converting the binary signal into adecimal signal, [52] U.S. Cl 340/347 DD, 340/336 a Second MOS matrixcircuit Connected to the first [511 in. C1. G06t 3/00 Mos matrix circuitfci ccnvciiiiig dccimai signal [58] Field of Search 340/347, 324.1, 336into a Character signal to be p y and a drive cuit connected to thesecond MOS matrix circuit for 5 R f n i d and applying the charactersignal to and driving the UNITED STATES PATENTS Nakauchi 340/336 R1DYNAMII) SHlFl H? READ lllll REGISTER ll SlGNAl ll'ltMllllV Q luminouselements.

3 Claims, 15 Drawing Figures VE BlIIlS 1; a 1. I5 is i: Bblllllllllililllllllfll ll: Sllillllll SIGN/ll BUNVERTER Silillll PATENTEBAPR 9:914

SHEET 3 [1F 7 INVENTORS YOSH l KAZU HATSUKANO KOSEI N 0M! YA ATTORN E Y5PATENTEU'APR s 1974 SHEET m 0F 7 IN VENTORS Y05HIKAZU HATSUKANQ Ro a NOMYA HIROTO KA AGOE aMwwws 1-502 ATTORNEYS 1 DISPLAY SIGNAL CONVERTINGAPPARATUS BACKGROUND OF THE INVENTION This invention relates to a signalconverting apparatus for converting a binary signal representing giveninformation into a signal utilized for driving a display device.

Display signal converting apparatus utilized to display bit signals asvisible letters or digits are now widely used in information processingapparatus such as table mounted electronic computers and electronicmeasuring apparatus such as a digital voltmeter. It is advantageous tofabricate such a signal converting apparatus on a single substrate byintegrated circuit techniques for the purpose of miniaturizing theapparatus, decreasing the weight, improving the reliability andoperating characteristics and decreasing the cost of manufacturing.

However, to fabricate such a signal converting apparatus as anintegrated circuit it is necessary to take into consideration the signalprocessing system of the information processing device which is coupledto the input terminal of the signal converting device and theconstruction of the operation of the display device coupled to theoutput circuit of the signal converting device. Thus, for example, whenfabricating the signal converting apparatus as an integrated circuit, itis necessary to select a suitable type which can satisfy the logiclevels (positive logic and negative logic) processed by the informationprocessing device as well as the construction and operation of thedisplay device or display system. The method of processing the logiclevels and the construction of the display device or display system aredifferent for different makers of information processing devices, andthere is no standard established in the art. For this reason, makers ofcomponent parts of the integrated circuits for use in the signalconverting apparatus are required to supply various types of theintegrated circuits which vary dependent upon the mode of operation ofthe information processing device so that it is impossible to reduce themanufacturing cost of the integrated circuits by mass productiontechniques. Factory installation for manufacturing integrated circuitsrequires a relatively large investment and the process steps formanufacturing the same also requires precise techniques.

In addition, large costs are necessary to develop new art. Whenconsidering the depreciation of these expenses, cost reduction ispossible only when the integrated circuits are manufactured on a massproduction scale.

SUMMARY OF THE INVENTION the signal converting apparatus as integratedcircuits.-

Still another object of this invention is to provide an improved signalconverting'apparatus including means for preventing some of the displaydevices from providing a visible display.

Another object of the invention is to provide an improved signalconverting apparatus for use in digit display devices in which essentialcomponents of the signal converting apparatus can be comprised byinsulated gate type field effect transistors and resistors which can bereadily fabricated as an integrated circuit.

A further object of this invention is to provide a novel display signalconverting apparatus which can be readily used for different types ofdisplay apparatus utilizing different combinations of luminous elementsrepresenting different letters or digits by mere change of the patternof the mask used to form the insulated gates of the insulated gate typefield effect transistors.

Still a further object of this invention is to provide a novel displaysignal converting apparatus applicable to information processingapparatus operating on positive or negative logic by merely changing thepositions of the insulated gate type field effect transistors comprisingthe signal converter device. This can also be by merely changing thedesign of the mask pattern for the insulated gate type field effecttransistors.

A further object of this invention is to provide a novel display signalconverting apparatus applicable to display devices using luminouselements operated by ON or OFF levels by merely changing the positionsof the insulated gate type field effect transistors. This can also beaccomplished by changing the pattern design of the mask for forming suchfield effect transistors.

According to this invention there is provided a signal convertingapparatus for converting a bit signal representing predeterminedinformation into a drive signal for operating a display device having aplurality of luminous elements, said display signal converting apparatuscomprising 1) signal memory means for storing the bit signal, (2) afirst signal converting means including a plurality of bit input lines,a plurality of character output lines, the bit input lines and thecharacter output lines being arranged in a matrix circuit, the firstcoupling means arranged between the bit input lines and the characteroutput lines to respond to a binary signal impressed upon the bit inputlines for producing a character output signal on a predetermined one ofthe character output lines, (3) means for applying the bitsignal to thebit input lines of the first signal converting means, (4) a secondsignal converting means including a plurality of character linesrespectively connected to the character output lines, a plurality ofdisplay drive output lines corresponding to the luminous elements, andsecond coupling means arranged between the character input lines and thedrive output lines to respond to the character output signals applied tothe predetermined one of the character lines for producing a driveoutput signal on a predetermined one of the drive output lines, and (5)means for supplying the drive output signal on the predetermined one ofthe drive output lines of the second signal converting means to theluminous elements of the display device.

According to this invention there is also provided display signalconverting apparatus for converting a bit signal representingpredetermined information into av drive signal for operating a displaydevice which operates to selectively display a plurality of differentcharacters by selective combinations of plurality of luminous elements,said display signal converting apparatus comprising (l) a plurality offirst drain semiconductor regions extending in parallel on the majorsurface of a first semiconductor substrate and of the numbercorresponding to the number of luminous elements of the displayapparatus, (2) first source semiconductor regions on the major surfaceof the first semiconductor substrate in parallel with and in closeproximity to the first drain semiconductor regions, (3) aplurality offirst load resistors respectively connected to the first drainsemiconductor regions, (4) a plurality of first gate metal regions ofthe number corresponding to the number of characters displayable by theplurality of luminous elements of the display device, the first gatemetal regions being disposed at right angles with respect. to the firstdrain semiconductor regions and to the first source semiconductorregions and are isolated from these regions by an insulator layer forforming insulated gate type field effect transistor elements at thepredetermined semiconductor regions between the first drainsemiconductor regions and the first source semiconductor regions, (5) aplurality ofparallel second drain semiconductor regions, correspondingto the first metal regions, the second drain semiconductor regions beingformed on the major surface of a second semiconductor substrate, one ofthe ends of the second drain semiconductor regions being connected tothe first gate metal region, (6) a plurality of second semiconductorregions formed on the major surface of the second semiconductorsubstrate in parallel with and in proximity to the second drainsemiconductor regions, (7) a plurality of second load resistorsrespectively connected to the drain semiconductor regions, and (8) aplurality of second gate metal regions for applying the bit signals, thesecond gate metal regions intersecting at right angles the second drainsemiconductor regions and the second source semiconductor regions, andare insulated from these regions by means of an insulator layer forforming a plurality of insulated gate type field effect transistorelements in aplurality of predetermined semiconductor: regions betweenthe second drain semiconductor regionsand the second sourcesemiconductor regions.

BRIEF DESCRIPTION OF THE DRAWINGS Further objects and advantages of theinvention will become apparent from the following detailed descriptiontaken-in conjunction with the accompanying drawings, in which: Y

1 FIG. 1 is a block connection diagram of one embodiment of the displaysignal converting apparatus constructed according to the teaching ofthis invention; FIG. 2v shows an equivalent circuit .of the circuitshown in FIG. 1; I I

FIGS. 3a and .4 are plan views of a portion of the novel display signalconverting apparatus fabricated by integrated circuit technique; V

FIGS. 3b and 3c are sectional views of certain por tions of theconverting apparatus shown in FIG. 3a;

FIGS. 5 and 6 are sectional views to show different steps of fabricatingthe integrated circuit;

FIG. 7 is a connection diagram, partly in block form, of the signalmemory means and inverter means shown in FIG. 1;

FIGS is a connection diagram illustrating a modified embodiment of thisinvention;

FIGS. 9 and 10 show block diagrams showing different display circuitsystems; a

FIG. 11 shows waveforms of electric signals helpful to explain theoperation of the banking circuit;

FIG. 12 shows practical constructions of the load resistors shown-inFIG. 1, and

FIG. 13 shows an arrangement of the luminous segments of the displaydevice adapted to display digits.

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 of the accompanyingdrawing shows one embodiment of the novel converting apparatus forproviding visual displays of bit signals of a shift register of a tabletype electronic computer on a display device of the digit type.

In the embodiment shown in FIG. 1, the result of the operation of anadder is written in a dynamic shift register R,. The information in thedynamic shift register R, is circulated through a feedback circuit 1connected between the input and output of the dynamic shift register tobe stored therein. The number of bits of the dynamic shift register isdetermined dependent upon the magnitude of the information to be storedtherein. For example, when it is desired to store decimal numbers of I4digits, at least 56 bits are required. The bit signal of the digit to bedisplayed is sent to a readout register R which comprises four bits andacts to convert a series signal into a parallel signal. The convertedbit signals are memorized in signal memories M, to M.,. A

first signal converter D, comprises a group of bit input lines 1, to I agroup of character output lines m, to m,,,, and coupling means a,, a aa, respectively responsive to bit signals applied to the group of inputlines I, to 1,, for providing a character output signal to the selectedone of the character output lines m, to m,,,. Each of the coupling meansmay comprise an insulated gate type field effect transistor (MOSFET)having a gate electrode connected to a bit input line and a drainelectrode connected to a character output line, as shown in FIG. 2. Moreparticularly, a MOSFET a, comprises a gate electrode g connected to abit input line I, and a drain electrode (I connected to a characteroutput line m,. Character output lines are connected to load resistorsr, to r respectively. As schematically shown in FIG. 12, these loadresistors may be comprised by MOSFETs. As shown in FIG. 1, bit inputlines I, to 1,, of the signal converting device D, are connected toreceive the output signals from memories M, to M.,, respectively.

Portions of these output signals are applied to the bit input linesthrough inverters I, to 1,, respectively.

FIG. 7 illustrates one example of a combination of memories M, to M, andinverters I, to I.,. As shown, pairs of memories and inverters may beformed of MOSFETs h, through h which can be fabricated as an integratedcircuit. Register R can also be formed of three delay type flip-flopcircuits DF,, DF, and DF, each comprising a MOSFET. Each flip-flopcircuit is driven by two phase clock pulses cp, and cp, to shift abinary information signal by the clock pulses cp, and cp In FIG. 7, asignal from register R is stored in an input capacitor 2 of the MOSFET hthrough a gating MOSFET h, to produce an inverted output of the inputsignal at the drain electrode of MOSFET h. A signal of the same phase isderived out from the drain electrode of an inverter MOSFET h Returningto FIG. 1, a second signal converter D comprises a group of characterinput lines m, to m',,,, respectively, connected to corresponding onesof the character output lines m, to m,,,, a group of display driveoutput lines n to n, disposed at right angles with respect to lines m tom,,, and coupling means disposed to respond to the signals impressedupon input lines m to m' for producing a drive output on predeterminedones of the drive output lines n to ri Again,

as shown in FIG, 2, each of the coupling means comprises a MOSFET havinga gate electrode 8 connected to a character input line and a driahelectrode connected to a drive output line. For example, a MOSFET b, hasa gate electrode g connected to the character input line m, and a gateelectrode connected to the drive output line m. Drive output linesconnected to the drain electrodes are connected to load resistors r to rrespectively. Like the load resistors r, to r connected to characteroutput lines these load resistors r and r can also be made of MOSFETs asshown in FIG. 12. The output signals from drive output lines it, to n ofthe second signal converter D are applied to drive circuits B to Brespectively which are connected to apply operating voltage to the inputterminals 9, to p, of a display device T.

The display device T includes eight luminous segments p, to p, which arearranged as shown. As is well known in the art, by selectiveenergization of the luminous segments any one of a group of digits from0 to 9 can be displayed. There are provided a plurality of such displaydevices of the number corresponding to the number of digits or of theorder of magnitude to be stored in the shift register R Thus forexample, where it is desired to display a numericalvalue of 14 digitsthere are provided 14 display devices. The switching operation of thesedisplay devices are effected by a control circuit C For the sake ofsimplicity, only one display device T is shown in FIG. 1. Actually,however, as diagrammatically shown in FIG. 9, a plurality of displaydevices T to T,, of the number corresponding to the number of digits tobe displayed are provided which are controlled by control circuit C on atime division basis. Alternatively, as diagrammatically shown in FIG.10, display devices T to T may be selectively operated without utilizingthe time division control by providing a plurality of signal memories M,to M,,, first signal converters D to D,,,, second signal converters D toD and driving circuits B, to B',,, each of the number corresponding tothe number of digits to be displayed. However, the display system shownin FIG. 9 is more advantageous because it requires a lesser number ofcomponent parts.

The display apparatus thus far described operates as follows. Uponreceipt of a signal to be displayed by respective bits 1, 2, 4 and 8 ofreadout register R the signals of respective bits are storedconcurrently in respective-signal memories. For the sake ofunderstanding, it is now assumed that bit signals 1, 0, l and 0representing a decimal digit 5 are stored in memories M M M and M.,,respectively. If level 1 is represented by a voltage-V and level 0 by avoltage of 0, respective memories will'store signal voltages of -V, 0,-V and 0, respectively. These signal voltages will supply V volts, tobit input lines 1,, l l and 1 whereas 0 volts will be supplied to bitinput lines 1 l 1 and 1 The voltage of 0 volts applied to bit inputlines l l l and 1 turns OFF MOSFETs a a 0 and (1 respectively coupled tothese input lines, thereby maintaining the voltage of the output line mat a negative value. In other words, input lines 1 l l and I constitutea NOR input circuit for output line m and the voltage V impressed uponbit input lines l l l and I, will produce a 0 output voltage on alloutput lines exceptingoutput lines m In this manner, the first signalconverter D, is constructed such that it produces an output voltage ononly one of the character output lines m to m in accordance with inputsignal voltages impressed upon its bit input lines I, to 1, inclusive.In the case where bit signals 0, 0, 0 and 0 are applied to register R anoutput voltage will be provided for only output line m whereas when bitsignals are l, 0, 0 and 1, the output voltage will be provided for onlyoutput line m Upon occurrence of a signal voltage -V on output line mthis voltage turns ON MOSFETs b I2 b b and b connected in a matrixcircuit in the second signal converter D whereby drive output voltagesare produced on respective output terminals p' p' p,, p, and p',, of thedrive circuits B, through B These output voltages cause segments 12,, pp p and p of the display device T to luminesce, thus displaying a digit5.

Since it is possible to, constitute all components of the abovedescribed display signal converting apparatus with MOSFETS, theapparatus can be readily fabricated as an integrated circuit on asemiconductor substrate.

FIGS. 3a, 3b, and 3c illustrate one form of the integrated circuit. Asshown in FIGS. 3a3b, the first signal converter D, comprises in pairs ofp-type drain semiconductor regions (m d, m d M d) and p-type sourcesemiconductor regions (M s, m s m s) which are formed on one majorsurface of a N-type silicon semiconductor substrate 10 and extend inparallel with each other, load resistors (r r r respectively connectedto the drain semiconductor regions, a p-type semiconductor region 11 forfixing the potential of the source semiconductor regions (m s, m s, M s)to a reference potential E0, a layer of silicon oxide 12 overlying themajor surface of the semiconductor substrate 10, and 1 aluminum layers ll .1, overlying the silicon oxide layer 12 at right angles with respectto the drain and source semiconductor regions. As shown in FIG. 3 b,each MOSFET constituting the NOR circuit can be readily formed by makingthinner the thick ness of a portion 13 of the silicon oxide layer 12extending between'drain semiconductor region m d and sourcesemiconductor region m s underlying metal layer 1 than that of the layer12. For example, the thickness of the portion 13 may be made to be l/ 10to l/2O of that of layer 12, for example 1,000A. Consequently, portion13 acts as the insulated gate of the MOSFET to enable channel controlbetween the source and drain electrodes.

Like the first signal converter D the second signal converter D is alsofabricated as an integrated circuit on the silicon semiconductorsubstrate. The second signal converter D comprises n pairs of p-typedrain semiconductor regions (n d, n d. n d) and p-type sourcesemiconductor regions (n s, n s. n s), a p-type semiconductor region 15for connecting one end of the source semiconductor regions (n s, n s. ns) to the source of reference potential E0 and in aluminum layers (1 ,1l overlying the silicon oxide layer 12, one of the ends of the aluminumlayers being connected to the drain semiconductor regions of the firstsignal converter as shown in FIG. 30. Again, each MOSFET is formed bymaking a portion of the oxide layer 12 thin.

As shown in FIG. 4, the source semiconductor region may be provided incommon for adjoining drain semiconductor regions. With this arrangement,the number of source semiconductor regions can be reduced to one half ofthat of the drain semiconductor region thereby increasing the density ofthe elements of the integrated circuit. As above described in connectionwith FIG. 12, since it is possible to form load resistors r, to r asMOS- FETs, respectively, they can also be formed as a part of theintegrated circuit of the silicon semiconductor substrate 10.

Typical process steps of fabricating the signal converting apparatusinclude:

1. A step of diffusing a p-type impurity into the major surface of anN-type silicon semiconductor substrate for concurrently forming drainregions and source regions for the character output lines, drain regionsand source regions for the drive output lines, and the drain and sourceregions for the load MOSFETS.

2. A step of forming a relatively thick silicon oxide film 17 on themajor surface of the silicon semiconductor substrate, as shown in FIG.5, or of forming a relatively thin silicon oxide film 18 of thethickness sufficient to act as an insulated gate electrode of a MOS-FET, as shown in FIG. 6.

g 3. A step of etching an exposed portion 20 of the silicon oxide film17 by using an etching mask 19 as shown in FIG. to form the thin portion13 acting as the insulated gate electrode of the MOSF ET or ofdepositing an oxide film 22 on the portion 13 of the oxide film 18acting as the insulated gate by applying a deposition mask 22 on thefilm 18 as shown in FIG. 6, and

4. A step of'vapor-depositing aluminum on the oxide film 17 or 18 forforming metal layers or strips for the bit input lines and characterinput lines.

With the novel signal converting apparatus where the construction ormode of operation of the information processing device and the displaydevice are changed, it is possible to simply change the design of thematrix circuit of the signal converting device by merely changing thepositions of the MOSFETs without the necessity of changing the array ofthe diffused semiconductor regions. More particularly, it is onlynecessary to change the pattern of the mask utilized in the etching ordeposition step described in the above described step 3 so that thinoxide films acting as the insulated gates are formed at the desiredpositions.

In a display signal converting apparatus utilizing MOSFETs, it isnecessary to use an etching mask suitable for reducing the thickness ofthe oxide film at portions 16 in the second signal converter D shown inFIG. 3a.

It is to be noted that the design of the display signal convertingapparatus should be changed in accordance with the construction of thedisplay device. More particularly, although in the above description aconverting apparatus utilizing luminescent elements combined to form acrisscross bounded by a rectangle has been shown, manufacturers mayutilize a display device in which the luminescent elements are combinedto form a figure 8 or another letter. For this reason, integratedcircuit manufacturers are required to manufacture display signalconverting apparatus having matrix circuits suitable for such differentdisplay devices. This invention can meet such a requirement by merelychanging the pattern of the mask utilized to form the insulated gate ofthe second signal converting device D shown in FIG. 3. This is extremelyadvantageous for IC manufacturers because they can manufacture manytypes of products ordered by customers without the necessity of largelychanging the manufacturing steps.

It is also necessary to change the design of the display signalconverting apparatus dependent upon whether the logic level processed bythe information processing device is positive logic or negative logic.The above embodiment has been described in terms of negative logic inwhich a potential of 0 volts was designated as a 0 level and -V volts asa I level.

On the contrary, where the information processing device operates onpositive logic wherein 0 volts is designated as a 1 level and V volts asa 0 level, it is necessary to provide another type of signal convertingapparatus suitable for this system. In accordance with this inventionsuch a change of the matrix circuit can be readily carried out by merelychanging the positions of the MOSFETs (the rectangular coordinate of theMOS- FETs) formed in the matrix circuit of the first signal converter D(see FIG. 1) or by changing the pattern of the mask.

Another factor that necessitates the change of the design of the signalconverting apparatus for use in display devices involves whether theinput level to the drive circuit means for the display devices is at anOFF LEVEL or an ON level. In the embodiment described above, the inputlevel to the drive circuit required to operate the luminescent segmentsof the display device corresponds to the ON level (0 volts) of theoutput of the second signal converting device. If it is desired to usean OFF level (-V volts for the input level for operating the luminescentsegments this can be readily accomplished by changing the positions ofthe MOS- FETS included in the second signal converter device. This canalso be readily accomplished by changing the pattern design of the mask.

The invention can also provide a display signal converting apparatusincluding a character suppressor or a blanking circuit means adapted tocontrol the time for applying drive signals to the display drive signalsto the display device. Where the display device is of the type whereinits luminous segments are operated by the ON level output (0 volts) fromthe second signal converter D the blanking circuit is comprised by MOS-FETs e through e coupled to respective character output lines of thefirst signal converter D On the other hand, where the luminous segmentsof the second display device D are operated by the OFF level output (-Vvolts) from the second signal converter D the blanking circuit iscomprised by MOS- FETs f, to f coupled to respective drive output linesof the second signal converter D Desired changes of the positions of theMOSFETs of the blanking circuit can be readily accomplished by changingthe pattern design of the mask in the same manner as above described.Such a blanking circuit provides novel advantages when incorporated intothe display signal converting apparatus of this invention. Moreparticularly, where the signal converting apparatus is constituted byMOS- FETs, there is more or less a delay between the application of bitsignals and the generation of the drive signals. This time delay resultsin a somewhat obscure display where a plurality of display devices areoperated on the time division basis by utilizing the combination of apair of signal converting circuit means and drive circuit means as shownin FIG. 9.

Although the degree of obscurity is different dependent upon theluminescent characteristics of the display device and thecharacteristics of the control circuit system for the time divisionsystem, utilization of the blanking circuit described above can obviatethis difficulty.

The operation of one example of the blanking circuit will now bedescribed with reference to FIG. 11. The luminous or operating voltagessuppliedto various display devices through the control circuit C on atime division basis are distributed with the time phases as shown inFlG.l'la through 11d. Furthermore, the signals to drive the first, second,third. nth display devices are also supplied insuccession to the displaydevices through the driving circuit B in the periods of time t t t trespectively. Thus, in the time period of the first display devicemainly displays a numeral corresponding to the signal to drive the firstdisplay device. However, due to the time delay in transmitting thesignal in' the signal converters, the driving signals to drivethedisplay devices are supplied thereto with a delay time 25, whereby inthe time period of t the display devices are forced to display numeralsother than the numeral to be displayed therein with a result ofobscurin'g the visible display. For example, the second display devicedisplays, the numeral to be displayed therein in .a relatively longperiod and also display the numeral to be displayedin the firstdisplaydevice in the very short period of i whereby the numeralsdisplayed in the second display device become to flash and it makesdifficult to read the display numeral. To prevent this, a blankingcontrol'signal voltage Vtp shown in FIG. lle is applied to-a blankinginput line q (see FIG. 1) to deenergize the display devices during aperiod t of the blanking control signal thereby preventing flashing orobscure luminescence of the display devices.

This kind of flashingor obscure luminescenceof the display devices iscaused by the time delay or time difference between the voltage suppliedto the respective display device through the control circuit device cand the signal voltage supplied in succession to the display devicesfrom the driving circuit device B. Therefore, thevoltages supplied tothe respectivedisplay device through the control circuit device aredelayed even if the delay time of the signal voltages in the signalconverters has been compensated by the provision of the followingcompensation circuit, so that phenomena such as flashing and obscurelightening of the display devices are caused. The above-mentionedblanking technique is also applicable to this case to overcome theabove-mentioned defects.

FIG. 8 shows a compensation circuit for the delay,

time of the signal converters which may be constituted by gating MOSFETsh and signal storing MOSFETs h, included in the drive output circuit ofthe second signal converter D More particularly, when gating MOS- FETsh,, are rendered conductive by clock pulse cp cuit c is synchronizedwith the clock pulse cp, supplied to the gates of MOSFETs h If desired,blanking MOS- PET-s [1,, may be connected in series with memory MOSFETsh, for providing the blanking operation. The signal converting apparatusprovided with such memory means is especially suitable for use incombination with a display device utilizing high speed digital displaydevices or semiconductor luminous diodes as the luminous elements.

The blanking circuit can also be used as the character suppress circuit.Where it is desired to prevent the display of a digit of a predeterminedorder of magnitude or where it is desired not to display'an unnecessary0 which was displayed at digits of a higher order than the highest digitof integer of the displayed numeral, a blanking signal is applied duringatleast the period in which the voltage is applied to the display devicethrough the control circuit 0 for example, during at least the period oft to the MOSFETs constituting the blanking circuit to interrupt thedrive input signals for the display devices.

Thus, the invention provides signal converting apparatus havingdifferent characteristics dependent upon the types of the displaydevice, logic levels of the information processing device and the inputlevels of the display drive circuit.'The invention can also provide asignal converting apparatus provided with blanking circuit.

. While the novel signal converting apparatus has been shown anddescribed for use in display devices displaying decimal digits it willbe clear that the invention can equally be applied to other displaydevices for displaying characters such as alphabets, and that manychanges and modifications are obvious to one skilled in the art withinthe true spirit and scope of the invention as defined in the appendedclaims.

What we claim is:

1. A display signal converting apparatus for converting a bit signalrepresenting predetermined information into a drive signalfor operatinga display device having a plurality of luminous elements, said displaysignal converting apparatus comprising:

1. signal memory means for storing said bit signal,

comprised of a plurality of pairs of field effect transistors connectedin series, at the output of each pair of which is provided acorresponding one of a plurality of memory bit output lines;

2. a first signal converting means including a plurality of bit inputlines, a plurality of character output lines, said bit input lines andsaid character output lines being arranged in a matrix circuit, andfirst coupling means arranged between said bit input lines and saidcharacter output lines to respond to a binary signal impressed upon saidbit input lines,

I termined one of said character output lines;

. 3. means for applying said bit signal to the bit input lines of saidfirst signal converting means; 4. a second signal converting meansincluding a plurality of character input lines respectively connected tosaid character output lines, a plurality of display drive output linescorresponding to said luminous elements, and second coupling means. ar-

ranged between said chara'cter input lines and said drive output linesto respond to the character output signal applied to said predeterminedone of said character input lines for producing a drive output forproducing a character output signal on a predeclaim 1, wherein saidblanking means includes a first signal supply line coupled'to saidcharacter output lines of said first signal converting means throughthird coupling means.

3. A display signal converting apparatus according to claim 1, whereinsaid blanking means includes a second signal supply line coupled to saiddrive output lines of said second signal converting means through fourthcoupling means.

1. A display signal converting apparatus for converting a bit signalrepresenting predetermined information into a drive signal for operatinga display device having a plurality of luminous elements, said displaysignal converting apparatus comprising:
 1. signal memory means forstoring said bit signal, comprised of a plurality of pairs of fieldeffect transistors connected in series, at the output of each pair ofwhich is provided a corresponding one of a plurality of memory bitoutput lines;
 2. a first signal converting means including a pluralityof bit input lines, a plurality of character output lines, said bitinput lines and said character output lines being arranged in a matrixcircuit, and first coupling means arranged between said bit input linesand said character output lines to respond to a binary signal impressedupon said bit input lines, for producing a character output signal on apredetermined one of said character output lines;
 3. means for applyingsaid bit signal to the bit input lines of said first signal convertingmeans;
 4. a second signal converting means including a plurality ofcharacter input lines respectively connected to said character outputlines, a plurality of display drive output lines corresponding to saidluminous elements, and second coupling means arranged between saidcharacter input lines and said drive output lines to respond to thecharacter output signal applied to said predetermined one of saidcharacter input lines for producing a drive output signal onpredetermined ones of said drive output lines;
 5. drive means forsupplying said drive output signal on said predetermined ones of saiddrive output lines of said second signal converting means to saidluminous elements of said display device; and
 6. blanking means forpreventing the application of a drive output signal to any of said driveoutput lines of said second signal converting means in response toreceipt of a blanking signal.
 2. a first signal converting meansincluding a plurality of bit input lines, a plurality of characteroutput lines, said bit input lines and said character output lines beingarranged in a matrix circuit, and first coupling means arranged betweensaid bit input lines and said character output lines to respond to abinary signal impressed upon said bit input lines, for producing acharacter output signal on a predetermined one of said character outputlines;
 2. A display signal converting apparatus according to claim 1,wherein said blanking means includes a first signal supply line coupledto said character output lines of said first signal converting meansthrough third coupling means.
 3. A display signal converting apparatusaccording to claim 1, wherein said blanking means includes a secondsignal supply line coupled to said drive output lines of said secondsignal converting means through fourth coupling means.
 3. means forapplying said bit signal to the bit input lines of said first signalconverting means;
 4. a second signal converting means including aplurality of character input lines respectively connected to saidcharacter output lines, a plurality of display drive output linescorresponding to said luminous elements, and second coupling meansarranged between said character input lines and said drive output linesto respond to the character output signal applied to said predeterminedone of said character input lines for producing a drive output signal onpredetermined ones of said drive output lines;
 5. drive means forsupplying said drive output signal on said predetermined ones of saiddrive output lines of said second signal converting means to saidluminous elements of said display device; and
 6. blanking means forpreventing the application of a drive output signal to any of said driveoutput lines of said second signal converting means in response toreceipt of a blanking signal.